UVM Agent connect phase error connecting driver to sequencer

In reply to cgales:

inside the i2c_master_configuration object? YES!!
like this NOW
rand uvm_active_passive_enum is_active=UVM_ACTIVE;

also by putting constraint!

Now another twist is that when in i2c_master_agent i have checked that either virtual interface is set or not? It says Virtual interface not set.

Even though i have set it in my i2c_top as

uvm_config_db#(virtual i2c_if)::set(null,“*”, “i2c_if”, vif);

and then i am getting it as well in my test class and it says it has virtual interface !!
May be this error is due to this virtual interface? Any idea?