In reply to hisingh:
Section 16.13.6 Sequence methods in the IEEE 1800-2017 SystemVerilog LRM answers both your questions. Sequence methods are set in the observed region. There is no race with a clock edge which happens in the active region.
In reply to hisingh:
Section 16.13.6 Sequence methods in the IEEE 1800-2017 SystemVerilog LRM answers both your questions. Sequence methods are set in the observed region. There is no race with a clock edge which happens in the active region.