$urandom_range('0, '1) gives single bit output

SystemVerilog
3

In reply to sbellock:

The difference is which situation is a self-determined context, or part of another expression/assignment context. According to section 10.8 Assignment-like contexts, passing a value to a subroutine (task/function) is an assignment-like context. By omission, arguments to system tasks are self-determined.

BTW, it would probably be more efficient to simply write

var_a = $urandom;