In reply to kiteloop:
An interface protocol covers both data directions, input and output. It says if you have certain inputs you will expect corresponding inputs.
To give an example.
You want to write/read a memory.
For the WR your input data are the direction = WR, addr and data. All these are inputs.
For a RD you have the direction = RD and the addr as inputs. And you expect a certain number of clock cycles later the data. Data is an output. If you have one monitor for the inputs and another one for the outputs you cannot model this behavior. See below the run_phase of an APB monitor:
task apb_monitor::run_phase(uvm_phase phase);
apb_seq_item item;
apb_seq_item cloned_item;
item = apb_seq_item::type_id::create("item");
forever begin
// Detect the protocol event on the TBAI virtual interface
@(posedge APB.PCLK);
if(APB.PREADY && APB.PSEL[apb_index])
// Assign the relevant values to the analysis item fields
begin
item.addr = APB.PADDR;
item.we = APB.PWRITE;
if(APB.PWRITE)
begin
item.data = APB.PWDATA;
end
else
begin
item.data = APB.PRDATA;
end
// Clone and publish the cloned item to the subscribers
$cast(cloned_item, item.clone());
ap.write(cloned_item);
end
end
endtask: run_phase