Translating System Verilog code to system C

SystemVerilog
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4

In reply to dave_59:

And for reporting messages can you please inform me how can we translate for below…? basically I am trying to find the right format to translate them

`uvm_error(get_type_name(), $psprintf("LCM Read Addr x=%0d y=%0d num=%0d greater than size=%0d",x,y,num,sbuff_size));

  1. verilog $write("%d:", y);

  1. verilog `uvm_info(get_type_name(), $psprintf("data[%0x] = 0x%20x",y*h_pitch((x+i)%h_pitch),data[y*h_pitch+((x+i)%h_pitch)]), UVM_HIGH);

  1. verilog $fdisplay(fp, "%08x: %80x %80x %80x %80x", i, data[i*4+3], data[i*4+2], data[i*4+1], data[i*4]);

and this expression

 data[y*h_pitch+((x+i)%h_pitch)] = wdata[(QWWIDTH-1)+QWWIDTH*i -: QWWIDTH];