In reply to dave_59:
In reply to mlsxdx:
You get a posedge clk at time 0 because its default initial value is 0, and you set it to 1 at time 0. Either remove your
clk = 0; procedural assignment at time 0, or declare it with an initial value of 1.
bit clk = 1;
That initialization happens before any other initial or always processes start. You can do the same thing with en. I am not exactly sure what you are trying to check.
The checker is from a third-party module, that I assume there may be a reason to put there.
In order to make the checker not fail, I am trying to see if there is a way to play with tb signals - clk, reset to get dut module output - en updating before inactive region(the checking en occurring in inactive region).
en is updating in NBA region(which is after inactive region), the initial #0 check it while en is still x(reg type initial value). Is my understanding correct?
Then I am getting confused on time0, why en is reset to 1 from the waveform even bit clk = 1?