Hi,
Please refer the link below that helps to generate the UVM framework with all the basic blocks. The framework can be run in EDA playground as well and there are videos that explain how to do that.
https://www.doulos.com/knowhow/sysverilog/uvm/easier_uvm_generator/
Mentor has UVM framework that does the same job but it creates the UVM framework that supports both simulation and emulation.
Verification academy has UVM TB examples along with the test plan in the link below
https://verificationacademy.com/cookbook/coverage/testplan_to_functional_coverage#Functional_Coverage_Examples
Hope this is useful.