In reply to chr_sue:
The thing is not we were not using UVM testbenches before. And my researches pushed me into those conclusions :
- An all-in-all software testbench is slower than an emulated one.
- It can be accelerated by moving some parts into hardware.
As of the coverage, what I meant is that in here the simulations and verification tests on motors are taking too long (around a whole day) so we can never intend to verify the system using an exhaustive list of stimulises. That’s the point. Accelerating the tests would enable the use of much more stimulises.