SystemVerilog $feof()

SystemVerilog
15

In reply to dave_59:

Hi Dave,
How would you handle the case of not reading the last line twice in the below case:
I have to start reading a file and compare it to the DUT output only when valid from DUT is high.

My initial code:

while ($feod(fd)) begin
  if (vif.valid ===1) begin
    $fscanf(fd, "%1b", vec_output);
    //Some comparison code
   end
end

The problem with the above code is I am reading the last line twice.

But if I follow what you mentioned above, the purpose of not comparing the data while valid=0 will not be met.

Thanks in advance.
Subhash