System verilog constraint

SystemVerilog
1

Given a NxN matrix, write a constraint to make sure only one row has 1 and only one col has 1. I think the first two constraints will unroll foreach such that all rows will have atleast one 1’s and all columns will have atleast one 1’s. Is this correct understanding?

The item1 & item2 constraints will unroll in such a way that arr[0][0] + arr[0][1] + … arr[3][3] == 2; This doesn’t guarantee that only one row will have 1 and only columns will have 1. How do we constriant for this case?

class test;
  rand bit arr[3][3];
  // you need to one in a row, one in a col.
  constraint ab_c {
    foreach (arr[i,j])
    {
      arr[i].sum(item) with (int'(item)) == 1; 
      arr.sum(item) with (int'(arr[item.index][i])) == 1;
      
    }
      arr.sum(item1) with (int'(item1.sum(item2) with (int'(item2)))) == 2;
   }
  

  
endclass
2

It would help to show an example of the results you are looking for. If only one row can have a 1, and only one column can have a 1, then only one element out of nine can have a 1.

3

For a 3x3 matrix, one combination is
0 0 1 // 1 row has 1
1 0 0 // 1 col has 1
0 0 0

4

To me that looks like two rows (0 and 1) have a 1, and two cols (0 and 2) have a 1.

5

As Dave said, it seems that your requirement is not same as your original post.

class test;
  rand bit arr[3][3];


constraint ab_c {
    foreach (arr[i,j]) {
      arr[i].sum(item1) with (int'(item)) <= 1; // rows
      arr.sum(item) with (int'(arr[item.index][i])) <= 1; //cols
      arr.sum(item1) with (int'(item1.sum(item2) with (int'(item2)))) == 2;
      
    
    }
  }
  
     
  
endclass