SVA: Package for dynamic and range delays and repeats

SystemVerilog
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8

In reply to ben@SystemVerilog.us:

Thanks Ben. I am aware of use of generate. However I was wondering if there are other methods. In one of the use case range of variable delays and their combinations are two many.

For example, say delay is controlled by three different variables d1, d2 and d3.
d1 inside [10:15]
d2 inside [20:40]
d3 inside [40-240].

So total combinations becomes about 621201 = 25326 possible cases. In such cases as well generate may not be the best method. Any thoughts on this?

Thanks & Regards
Singhal R