New book: Knowledge-Driven AI for SystemVerilog Assertions: A Verification Framework of Methodologies, Processes, and Coding Rules 2026
Book ships with downloadable RAG-SVA Files
See systemverilog.us
Checkout my papers on AI and SVA using my new book.
PAPERS
- OVL Arbiter, 𝗖𝗹𝗮𝘂𝗱𝗲 𝘄𝗶𝘁𝗵 𝘃𝘀. 𝘄𝗶𝘁𝗵𝗼𝘂𝘁 𝗦𝗩𝗔-𝗥𝗔𝗚 𝗳𝗼𝗿 𝗙𝗼𝗿𝗺𝗮𝗹 𝗩𝗲𝗿𝗶𝗳𝗶𝗰𝗮𝘁𝗶𝗼𝗻
- 𝗔𝗜-𝗔𝘀𝘀𝗶𝘀𝘁𝗲𝗱 FV 𝗼𝗳 𝗮 SV 𝗣𝗮𝗿𝗸𝗶𝗻𝗴 𝗟𝗼𝘁 𝗖𝗼𝗻𝘁𝗿𝗼𝗹𝗹𝗲𝗿
- grnt → req, Claude LLM vs Claude LLM + RAG
- 𝗣𝗮𝗽𝗲𝗿: 𝗜𝘁’𝘀 𝘁𝗵𝗲 𝗥𝗲𝗾𝘂𝗶𝗿𝗲𝗺𝗲𝗻𝘁𝘀, 𝗦𝗧𝗨𝗣𝗜𝗗!
- Post: Path for engr for effective solutions
- 𝗣𝗔𝗣𝗘𝗥: 𝗖𝗼𝗻𝘃𝗲𝗿𝘁𝗶𝗻𝗴 𝗟𝗲𝗴𝗮𝗰𝘆 𝗣𝗦𝗟-𝗦𝗜𝗠 𝘁𝗼 𝗦𝗩𝗔-𝗙𝗩-𝗥𝗲𝗮𝗱𝘆 𝗖𝗼𝗱𝗲
- 𝗣𝗔𝗣𝗘𝗥: 𝗖𝗼𝗻𝘃𝗲𝗿𝘁𝗶𝗻𝗴 𝗟𝗲𝗴𝗮𝗰𝘆 VHDL 𝘁𝗼 𝗦𝗩𝗔-𝗙𝗩-𝗥𝗲𝗮𝗱𝘆 𝗖𝗼𝗱𝗲 + SPECS
- 𝗣𝗔𝗣𝗘𝗥: 𝗖𝗼𝗻𝘃𝗲𝗿𝘁𝗶𝗻𝗴 SV/SVA 𝘁𝗼 VHDL/PSL
- 𝗣𝗔𝗣𝗘𝗥: RAG-SVA Paradigm Shift in FV
- 𝗣𝗔𝗣𝗘𝗥:𝗚𝗲𝗻-𝗦𝗩𝗔: 𝗦𝗼𝘂𝗿𝗰𝗲-𝗔𝗴𝗻𝗼𝘀𝘁𝗶𝗰 𝗚𝗲𝗻𝗲𝗿𝗮𝘁𝗶𝗼𝗻 𝗼𝗳 𝗙𝗼𝗿𝗺𝗮𝗹-𝗥𝗲𝗮𝗱𝘆 𝗦𝗩𝗔
- 𝗣𝗔𝗣𝗘𝗥:Degeneracy, Environment vs. Obligation, and Design Intent A req/ack Case Study
- What if AI Scribe for Doctors Were Used for AI Scribe for Chip Design and Verification?
- 𝗣𝗔𝗣𝗘𝗥: FV Abstraction Techniques in RAG-SVA