In reply to Mitu Raj:
So having a signed logic with only 4 bits means you can decode numbers from -7 up to 8. If you shift on left (multiply by 2) a signed number 0101 (5) you are going to overflow producing 10 unsigned but 1010 which is -6 since it will wrap around.
On top of that the << operator is a logical operator the arithmetic one which will take care of signed operands is <<<.
For the signed you a casting so the result 1010 after the shift will be considered as signed and so extended giving you the result 111010 which is correct (-6).
Your issue is with the dimensions, as stated in the LRM the <<< operator will fill with 0s staring from the bottom so your result will still be 1010 it cannot be further extended since there is no further space. Then it will be assigned to be (which is signed) but is 6 bits instead of 4 and 1010 is still in the interval [-2^(n-1)-1:2^(n-1)].
adding signed as casting then will consider the result as signed on 6 bits and so will extend it as consequence.
module tb;
logic signed [5 : 0] a = 6'b011101;
logic signed [5 : 0] b, c;
// these 2 are identical
assign b = (a <<< 1);
assign c = signed'(a << 1);
initial begin
#1;
$display("a: %b",a);
$display("b: %b",b);
$display("c: %b",c);
end
endmodule
Looking at the above code adjusting the dimension will give proper result.
Regards