SystemVerilog guarantees that abc_2 will not execute in CASE 2 because there is a defined execution ordering of statements within a begin/end block, and it will get stuck during the second call to abc_1.
However, there is no defined execution ordering of statements within a fork/join block. You might be able to deduce the particular ordering of a implementation, but you cannot rely on that ordering. An implementation that chooses to first execute the last statement as it appears in the source will call abc_2.