Reset sequence management : jump and multi phase sequences

Hello,

I am working under a UVM environment using sub-phases of the run_phase (mainly reset phase and main phase).
The environmenet is developped to mimic the behavior of the DUT. Which means the reset protocol of the DUT happens during the reset phase, and the operations performed on the DUT happens during the main phase.
If a reset happens during the main phase, I am using the jump function to go backward to the reset phase.

During a simulation, it may happen to alternate between operation phase and reset phases, meaning that I have to loop few times on the reset and main phase.
When I call a reset virtual sequence in the test, the body will execute an item with uvm do on my “reset UVC”. It will start in the main phase, and end at the beginning of the main phase (or end of reset phase).
From driver point of vue, I do “get next item” in the main phase, and perform the corresponding item done at the end of reset phase or beginning of next main phase.
I am using a standard uvm sequencer, with my transaction type given as parameter of the class.

The issue is that when calling item done in the driver, there is no error, but in the virtual sequence, the body never ends because uvm_do calling the sequencer and driver never comes back. Meaning that the item done line is reached in the driver, but if I do a print in the vseq body after the uvm do, I never reach it.

Am I doing something wrong ?
Is there a better way to make it work ?

Best regards, Julien

The best approach is to not use sub-phases. Instead, you should use sequences which direct the behavior you require all within the run_phase.

In other words, you test should consist of a reset_sequence, followed by a configuration_sequence and data_sequence. If you desire, you can interleave the sequences using a virtual sequence to get the behavior you require.

You also must ensure that you have a method to terminate all of your sequences and in-flight sequence items properly, because if you terminate a sequence while there are outstanding sequence items, you will hang your sequencers.

Hello cgales,

1- What is the case in which you want to use the sub-phase coding style then ?

2- Can I rephrase what you said by saying : “A sequence item should be driven and terminated in the same phase, otherwise the sequencer lose the reference to that item and cannot finish it” ?

Thank you