In reply to chr_sue:
Hi, my chip is big SoC.
It has interfaces to analog component (ADC, DAC, comparators etc)
It has interfaces to CPU serial communication protocol.
it has interfaces dedicated to external IC that talk with him in non standard protocol.
and he also have RESET PIN (async)
now the chip is working for a allot of time after power up (TLM’s run crazy).
After 1 year of operation the user decides to assert the reset.
all the sequences might in the middle of transaction.
sequencers might have big queue in there FIFO.
Scoreboards might be in the middle of PASS/FAIL evaluation
etc.
If I won’t take the correct actions I will get hundreds of UVM_ERROR