In reply to chr_sue:
In reply to syed taahir ahmed:
Unfortunately you do not explain what is initiating the reset. If you have a reset sequence then the reset is testbench driven. You could kill all sequences when the reset willl be asserted and you can restart them after the reset is deasserted. Or you could stop the current sequences execute the reset sequence and afterwards continue the stopped sequences. Your requirements and conditions are not clear.
Hi Chris,
Probably what my requirement is :: reset is top signal i assert and deassert using interface in between the simulation randomly so once the reset is asserted I should kill all sequences and enable all when reset is asserted!!
As you mentioned above, I want to know syntax how to kill the sequences which are spread in the testbench once reset is asserted and enable after deassert of reset.
Thanks