See http://systemverilog.us/vf/a20bnota.pdf
task automatic t();
int count=0, pass=0;
realtime vnow=$realtime, vend;
fork
begin @(posedge a); end
begin forever begin
@(b) count++;
vend=$realtime;
end
end
join_any;
am_ab: assert($realtime-vend <- 20ns && count ==20);
am_a2a: assert($realtime-vnow == 100ns);
endtask
always @(posedge a) t();
I found an [older post]
where the logical reasons behind legality are mentioned.
Correct, multiclocking is is illegal in intersect
ap: assert property(@ (posedge clk) a[*5] and @(b) b[*4] );
Directive ‘ap’ has multiple leading clocks for its maximal property.
ap: assert property(@ (posedge clk) a[*5] and @(posedge clk) 1 ##0 @(b) b[*4] );
OK