Randomizing the real voltage(0.0, 0.1, 0.2.......1.9) in SV testbench enviornment

SystemVerilog
3

In reply to dave_59:

In reply to ravishekhar0004:
$urandom_range(19)/10.0

Hi Dave,
i have tried with the below code .But display addr_range is not coming
module abc();

int addr_range;
initial begin

addr_range = $urandom_range(19)/10.0;

$display(“the value of the addr_range is %f”,addr_range);
end
endmodule

Tried with this option also
real addr_range;
$display(“the value of the addr_range is %d”,addr_range);