Randomize and constraint to get 4-6MB range of a [31:0] address?

SystemVerilog
1

Hi All,

I am trying to understand how to get a range for 4 - 6 MB, how to convert in bits or int to add in the rand keyword and constraint it to get desired. Can anyone help here …

2 
class whatever;
  rand bit [31:0] address;

  constraint size_constraint {
    address inside {[32'h40_0000 : 32'h60_0000]};
  }
endclass