RAL built-in sequences (e.g uvm_reg_bit_bash_seq) : how to exclude RO/undefined fields from test?

UVM
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2

Hello,

Nobody ?

I found a first potential solution for defined fields that I don’t want to check (WO, RO), using the set_compare(UVM_NO_CHECK) on the specific field.

However, I am still lacking a solution for undefined bits (matching no fields in Register definition).

Thanks in advance for any help / advise on this topic,