RAL access stuck and not executed

UVM
,
3

In reply to mitesh.patel:

Hi, basically this is the flow (also driver code is below):

  • reg1.write() issued

  • reg2bus() done, Driver gets transaction from Sequencer

  • reg1.is_busy() = 1 (this register becomes busy)

  • trans starts on the bus

  • trans ends on the bus, Driver calls end_tr() and item_done(), waiting for new transaction from Sequencer

  • reg1.is_busy() = 0

  • after some time

  • new reg2.read() issued

  • reg2bus() done

  • reg2.is_busy() = 1 (this register becomes busy)

  • Driver never gets transaction from the Sequencer

  • reg2.is_busy() = 1 remains forever

    virtual task run_phase(uvm_phase phase);
    m_req=new();
    m_req.enable_recording(“drv_item”);
    void’(this.begin_tr(m_req,“sent_items”));
    this.end_tr(m_req);
    // Drive initial signal values to IF
    …
    // Call main driving task
    do_access();
    endtask: run_phase

    task do_access();
    forever begin
    uvm_info(get_type_name(), $sformatf("Wait a transaction from sequencer"), UVM_LOW); seq_item_port.get_next_item(m_req); uvm_info(get_type_name(), $sformatf(“Got a transaction from sequencer, wait mbox_full=0”), UVM_LOW);

          // Wait some condition
      while (...) @(posedge clk);

      `uvm_info(get_type_name(), $sformatf("Driving a transaction: %s\n", m_req.sprint()), UVM_LOW);

      void'(this.begin_tr(m_req,"sent_items"));

      // Drive signals to IF
      ...

      // Wait some small delay
      ...

      `uvm_info(get_type_name(), $sformatf("Ending a transaction"), UVM_LOW);
      this.end_tr(m_req);

      seq_item_port.item_done();
      `uvm_info(get_type_name(), $sformatf("Emit item_done()"), UVM_LOW);
  end

    endtask: do_access