here is the code and waveform:
At 21000ps, is there a race condition for output y1?
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Just looking at your code, I see race conditions, but more importantly, your always blocks have inertial blocking delays. That means if a or b change faster than the delay, you miss the change and will have to wait for another change.
Your last always process waits for a change on a or b, then evaluates the RHS of the blocking assigment and the blocks the process for 4 time units. After 4 time units, the result get assigned to y4 and the always process starts waiting for another change on a or b. The problem is if a or b changes while that process is blocked for 4 time units, the always misses the change and has to wait for the next change to evaluate the RHS. If a or bchanges at exactly 4 time units, then it is a race condtion if the always block gets to see the change or not.
You should never use blocking delays when modeling combinational logic. Use nonblocking assignments.