Race between procedural Blocks and always block triggering itself

[dave_59]

This post should explain how event controls interact with procedural blocks.

Event @(posedge clk)

Here’s a quick course on procedural code in Verilog: always statement; is an instantiation of a procedural process that begins at time 0, and when that statement completes, it repeats. initial statement; is also an instantiation of a procedural process that begins at time 0, but when that statement completes, the process terminates. All always and initial blocks start concurrently at time 0 in any order that is not deterministic. You cannot nest always or initial blocks inside each other as the…

Since you declared i1 as a bit, its value is already 0. Assigning it to 0 doesn’t change its value. Even if you assigned it to 1, there’s a race condition because the procedural block might not see the change.