It should be the logical because
- that is the intent, it reads better,
- Does what you want.
For example:
bit[2:0] a=3’b101, b=3’b010;
bit x, y;
if(!a) …// Since a >0, !a is false
if(~a) …// ~a==010, thus ~a is true, not the intent.
a && b |-> … // a is true, b is true since they are > 1
// thus a && b is true
a & b |-> // bitwise and, thus a & b is 3’b000
// a & b is false
Ben Cohen SystemVerilog.us