Hi Ben,
The book title is “The Power of Assertions in system verilog” by Eduard Cerny.
We are using questasim however, my question is not specific to this tool. I have a general question (which is rather academic in nature) that given an assertion which uses Intersect operator, can we write the same logic without using the intersect operator, (based on the statement made in the book. The book also says that Intersect operator is replaced by all combinations of events).
for example,
a1: assert property (
command |-> write_cmpl [-> 1] intersect read_cmpl [-> 2]);
Question was can we implement the logic of assertion a1 in alternative way without using Intersect since the book gives this as exercise question at the end of chapter. How to replace this logic by all combinations of events as stated in the book?
To summarize, the question I wanted to ask was : Is the logic given in question asked in my July 24 post correct? Can the intersect operator be replaced by the logic given in the July 24 post. (please refer to the question asked in my July 24 post above)
rgs,
-sunil