Hi Ben,
thank you for the explanation.
I have a requirement in which we need to check if a clock is toggling throughout the simulation. Now if the clock is derived from another clock by dividing by an integer (which is programmed in a register), we can check this using statement similar to following :
- (assuming clock period is 2n, n is passed as argument)
drclk_prop1: assert property (
disable iff (reset) @ (posedge clk)$rose(clk_derived) |-> ##n !clk_derived
);
Similar statement can be written for clk_derived falling edge followed after n clks by clk_derived.
Is it a correct approach?
- Another way would be to write a sequence of (clk_derived ##n !clk_derived) repeated very large number of time and write it in assert property statement.
drclk_prop2 : assert property ((clk_derived ##n !clk_derived)[*1000]); //1000 number is
//arbitrarily chosen.
but there may not be 1000 clocks till simulation ends. How does one ensure that this sequence repeats till end of simulation?
-
If the clock in above problem is not a derived clock but a basic clock, it is not possible to check using an any assertion if it toggles continuously. Is this correct?
-
For the clock which is not derived but basic clock, we can however check if the period of the basic clock is 100 or 200 ns by using $time to get the interval between the times at which it is toggling. Is this correct approach?
regards,
-sunil