Hi Moderators,
I was revisiting the topic of Randomization and examining some of its underlying concepts from a logical perspective.
I’ve listed several questions below as they all ( except for [6] ) stem from the same topic and are closely related.
[1] As per LRM "The randomize() method returns 1 if it successfully sets all the random variables and objects to valid values; otherwise, it returns 0. "
[Q] Is there a reason behind the return type of randomization being int type and not bit type ?
[2] Why does randomization failure result in long list of messages ( tool specific ) ? I couldn’t find anything regarding this in LRM.
[3] Why is randomization considered successful in absence of any constraint / random variable ?
class sample;
// No random variable / No constraint
endclass
sample s = new();
initial begin
if(s.randomize()) $display("Success");
end
[4] When would following constraint do ? Also when would it pass ?
rand Obj obj1 , obj2;
// Assume these are created before calling randomize()
constraint Handle { obj1 == obj2; }
[5] Is there a logical reason behind restricting handle types as strictly rand ? LRM mentions that declaring them as randc is illegal
[6] In SystemVerilog what is the difference between statement and expression ?
Does left-hand side and right-hand side exist in both ?
Eg1: rand_array.rsort(); // Absence of LHS.Is this a statement or expression ?
Eg2: obj = new(); // Presence of LHS.Is this a statement or expression ?
Eg3: a = b + c;// Presence of both LHS & RHS.Is this a statement or expression ?
Thanks in Advance