In reply to Antonio:
In my toplevel module I do the following:
logic [63:0] comp_mem00 ; //declaring a dynamic memory of 64 bit words
…
// preloading the design memory
always @ preloading_e begin //loading the deseign mem, when the preload sequence has been
// started
comp_mem00 = new[2MEM_ADDR_SIZE-1]; //constructing a dynamic memory of size2MEM_ADDR_SIZE
uvm_info("wideIO2_top_tb", "preloading_e triggered", UVM_HIGH) $readmemh("pattern00.hex",dut.<path to the mem>); // perfoming a sanity check foreach (addr00[i]) begin if (comp_mem00[addr00[i]] == dut.<path to the mem>.i_memArray[addr00[i]]) pass_count00++; else begin error_count00++; uvm_info(“wideIO2_top_tb”, $sformatf(“sanity check design mem :: addr = %0d,
comp_mem00 = %h :: memArray00 = %h”, addr00[i], comp_mem00[addr00[i]],
dut..i_memArray[addr00[i]]), UVM_HIGH)
end
In my preload sequence:
// pre-loading internal memory (testbench)
`uvm_info(get_type_name(),“preloding testbench memory”, UVM_MEDIUM)
$readmemh(“pattern00.hex”,mem00);
→ preloading_e; /triggers the preload in the toplevel module
The trigger is declared in a common package available for the sequence aadn the toplevel module.