Passing parameters from command line

UVM
, , ,
8

In reply to rgarcia07:

Please do not apologize, I am the first who dont explain very good the problem that I am having. Try this code in a simulator to see the differences between what I want and your idea of nested for loops:


typedef bit [127:0] tdata_t;
module tb;
	tdata_t expected_tdata_pkg;
  	tdata_t tdata;
	int WDW = 32, RDW = 16;
  	bit [7:0] data;
  
	initial begin
      $display ("tdata=%0h \n expected_tdata_pkg=%0h \n", tdata, expected_tdata_pkg);
	  tdata = 32'hcafeabcd;

      $display ("tdata=%0h \n expected_tdata_pkg=%0h \n", tdata, expected_tdata_pkg);
      
      for (int i = 0; i < (WDW/RDW); i++) begin
        //for (int j = 0; j < RDW; j++) begin
          expected_tdata_pkg = tdata[16*i +: 16]; // RDW
        //end
        $display ("tdata=%0h \n expected_tdata_pkg=%0h \n", tdata, expected_tdata_pkg);
      end 
      
      expected_tdata_pkg = 0;
      for (int i = 0; i < (WDW/RDW); i++) begin // I'm assuming you know the length or use a foreach
         for (int j = 0; j < RDW; j++) begin
             data[j] = tdata[i*RDW + j]; 
         end
         expected_tdata_pkg[i] = data;
         $display ("tdata=%0h \n expected_tdata_pkg=%0h \n", tdata, expected_tdata_pkg);
      end
	end
endmodule