Passing .hex file to RTL

SystemVerilog
,
4

In reply to Saikrishna B:

Parameters cannot be set with values evaluated at run-time.

You can compile your code with a +define+INITFILE=“filename”

and then in your testbench

module tb_top;
string dv_init_file;
 xyz #(
 .HEX_FILE(`INIT_FILE)
) dut(
 .clk(clk)
);

Getting your tool to recognize “filename” as a string literal is going to be shell and tool specific.

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