I think the solution will have to be to use a union inside the module that writes the data into the storage and have two different looking ports on the module for the two views.
No package hence can be parameterised in the normal way.
Not as elegant but I think this should work.
module flags
(
input wire clk,
input wire clk_en,
input wire reset_n,
input wire write,
input wire [5:0] flag_idx,
input wire [1023:0] new_flags,
input wire mode,
output wire [511:0] flags_mode0[63:0]
output wire [1023:0] flags_mode1[31:0],
);
typedef union packed
{
reg [511:0] mode0[63:0];
reg [1023:0] mode1[31:0];
} flags_union_t;
flags_union_t flags;
always @(posedge clk or negedge reset_n)
begin
if (reset_n == 1'b0)
begin
for (int unsigned i=0; i<32; i++)
flags.mode1 <= {1024{1'b0}};
end
else if (clk_en)
begin
if (slot_write)
begin
if (mode == 1'b0)
flags.mode0[flag_idx[5:0]] <= new_flags[511:0];
else
flags.mode1[flag_idx[4:0]] <= new_flags[1023:0];
end
end
end
assign flags_mode0 = flags.mode0;
assign flags_mode1 = flags.mode1;
endmodule