Packed array to unpacked array and vice versa?

SystemVerilog
5

In reply to dave_59:

for this case,

a = {<< 3 {b}};


a[3][2] = b[2];
a[3][1] = b[1];
a[3][0] = b[0];
a[2][2] = b[5];
a[2][1] = b[4];
a[2][0] = b[3];
a[1][2] = b[9];
a[1][1] = b[8];
a[1][0] = b[6];
a[0][2] = b[11];
a[0][1] = b[10];
a[0][0] = b[9];

Is this the complete assignment?

similarly could you give an example and explain b to a and b1 to a1 as well?

Thanks,