Timi, Thanks for your answer. I think I can indeed get away with some stuff in a base class common to all types. probably not exactly as you demonstrated, but I can add virtual functions to the data types that tell how the type has to be plotted or so, but that is not a nice encapsulation.
Btw: I really need a polar class for some quantization error reasons.
So we can come up with not so clean solutions (eg the thing with the subclass does work I think, it is just an awful syntax).
I wonder why the Systemverilog standard doesn’t simply allow parameterized class methods like c++ does. That would make things so simple.