Need of super.build_phase(phase)

UVM
,
10

Hi Dave,

I have a

base_test extends uvm_test

and

test1 extends base_test
  • If I don’t declare/define build_phase in test1, the base_test’s build_phase is called/executed automatically
  • If I declare/define buil_phase in test1, and call super.build_phase() here, the base_test’s build_phase is called/executed again after the above automatic call/execution?
  • What is the difference between the two above?
  • How can I completely override base_class’s build_phase, as it is automatically called in uvm? This is required if I need to completely override a common register config from base_test to test1.

-mpattaje