In reply to Dhruvesh.b:
Hello,
I am new to uvm_ral and i am having a ral model in which i want to access multiple write method for multiple register in a single ral_sequence body task.
For better understanding, sharing bit of a code,
task reg_addr_sequence :: body();
uvm_status_e status;
reg_block.addr_reg.write(status, 8’d89);
reg_block.clk_low_reg.write(status,9000);
reg_block.clk_high_reg.write(status,5600);
endtask
Hoping for your guidance,
Thank you in advance.
Dhruvesh.b
In this sequence i am facing an issue in adapter reg2bus method,as uvm_reg_bus_op is having only one data i.e rw.data, so data will have one value out of this three (89,9000,5600),in my case (rw.data == 9000),
So what is the correct approach to resolve this situation.
Thank you.
Dhruvesh.b