IMPORTANT NOTICE:
Please be advised that the Verification Academy Forums will be offline for scheduled maintenance on Sunday, November 9th at 1:00 AM US/Pacific.
Verification Academy
Merge event
SystemVerilog
actual-interface
,
event
,
SystemVerilog
dave_59
February 16, 2017, 5:17pm
3
In reply to
msshah
:
The first ->trig is definitely a race condition between the two
initial
blocks.
show post in topic