Mapping of inputs & ouputs

SystemVerilog
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2

In reply to veeresh_03:

  1. Many inputs to one output → multiplexer with a select signal that determines which input gets routed to the output.

  2. Many inputs to many outputs → combination of multiplexer and demultiplexer.

  3. Do you mean single input to many outputs? That would be a demultiplexer with a select signal, or just directly tying the single input to all the outputs.