Logic to rsp asserted 8clks after req

UVM
3

In reply to UVM_SV_101:

Hi,
I am trying to implement logic in driver class to check that rsp is asserted 8 clks after valid is asserted. Valid could be back to back.
Is there a better way to write it?


task run_phase();
forever begin
@(posedge clk)
if(valid)begin
fork
req_rsp_8_clks();
join_none
end
end
endtask
task automatic req_rsp_8_clks();
repeat(8)
@(posedge clk);
vif.rsp = 1'b1;
@(negedge clk)
vif.rsp = 1'b0;
endtask

Your code is driving the rsp signal.
If you want to check the correct behavior of the rsp you might use a SV Assertion checker.