Local variable assignment in Multithread consequent

SystemVerilog
,
9

In reply to MICRO_91:
Hopefully, your reply was to my reply with
EPWave Waveform Viewer wave
Fig9_1_Part2(1) - EDA Playground code
I added a “go” to restrict the model to one successful attempt

    sequence dataCheck ;
      int  local_data;
      ( $rose(go) ##[1:5] rdDone,local_data = rData )  ##5 ( ( wData == (local_data) ) ); //$display("T: %3t  wData == %0d ",$time , wData ) ); 
    endsequence
 
  function void count(); at_end=at_end+1; endfunction
  ap_test: assert property(  dataCheck  |->  (1, count())  ) 
    begin pass=pass+1; $display("T: %3t  Assertion  PASS " , $time );  end
    else begin fail=fail+1; $display("T: %3t  Assertion  FAILS " , $time ); end

Q: When does a sim tool fire the action block for a pass or a fail?

  • An assertion evaluation for each attempt can either PASS or FAIL
  • There NO some pass but other fail
  • A PASS can be vacuous or nonvacuous
  • Verification tools provide various options and switches to control how assertions are handled during simulation, including suppressing vacuous assertion passes.
  • If you wish, you can change the default switch of not executing the vacuous pass action block. However, because vacuous passes have no value or interest, users prefer the default.
    Edaplayground is set to not execute the action block for a vacuous pass.
  • A vacuous pass occurs in the cycle in which the evaluation of vacuity exists; that could be in at its attempt or within a thread.> So 1st attempt at T:5 results in no thread failing. Last thread with NVP is at T:105.
    Hence assertion pass action block should execute at T:105At T5 you determined vacuity, then that attempt passed vacuity at T5. Where do you get this T105? Also, the pass action block is suppressed, and the pass=pass+1; action block is not executed (see the simulation waveforms).
  • An assertion FAIL and its action block occurs in the cycle in which it occurs
  • This model and TB have 5 threads when the attempt with $rose(go) is true, 2 of which are NV. All the other attempts are vacuous since $rose(go) is false. The PASS action block is executed when all the threads are evaluated and one of the threads is NV. SIm shows ONE PASS action block, with the variable pass==1 at T105

Ben Cohen
Ben@systemverilog.us
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