In reply to ben@SystemVerilog.us:
All threads have to first be tested before you get a PASS,
Thanks Ben ,
With the multi-threaded antecedent for the assertion to pass :
each thread must have either a non-vacuous pass or vacuous pass , without any thread failing
i.e if antecedent has non-vacuous pass then the consequent must have a match else the assertion fails.
Have added changes to the code with pass and fail counter: edalink2
What should be the pass count at end of simulation ? I observe different results across tools.