In reply to cgales:
To prevent the test not to exit I added a dummy delay in the sequence class ( which should otherwise wait until it got all the responses through the scoreboard etc). Let me know if providing the link to code on EDAPlayground is fine.
class t_sequence extends uvm_sequence #(packet);
`uvm_object_utils(t_sequence)
int num_trans;
function new(string name="my_sequence");
super.new(name);
endfunction
virtual task body();
packet pkt;
$display("In Body Task");
if(!(uvm_config_db#(int)::get(null,this.get_full_name,"req_count",num_trans)))
begin
`uvm_warning(get_type_name(),"Transaction count not specified in Test Top")
num_trans =10;
end
else `uvm_info(this.get_full_name,$sformatf("Running sequence with %d requests",num_trans), UVM_HIGH);
pkt = packet::type_id::create("pkt");
use_response_handler(1); // Enable Response Handler
for(int i=0;i<num_trans;i++)
begin
`uvm_info(this.get_full_name,$sformatf("Sending request number %d",count), UVM_HIGH);
start_item(pkt);
assert(pkt.randomize());
`uvm_info(get_type_name,$sformatf("Addr=%0x Data=%0x",pkt.addr, pkt.data), UVM_MEDIUM);
finish_item(pkt);
end
#100;
`uvm_info(this.get_full_name,$sformatf("Idle waiting"), UVM_MEDIUM);
wait(count == num_trans);
endtask
function void response_handler(uvm_sequence_item response);
count++;
`uvm_info(get_type_name,$sformatf("Responses Received=%0x",count), UVM_MEDIUM);
endfunction: response_handler
endclass