Implementing Block-Level Testbench with Valid-Ready Protocol annd req and resp

UVM
1

Hi,

I’m working on implementing a block-level testbench for a DUT that communicates using a valid-ready protocol.

  • The DUT will issue read requests to memory using a valid-ready interface, providing an address.
  • Another valid-ready interface will be used by memory to return the corresponding data.

I have a few questions regarding the best approach to implement this:

  1. Should I implement a single agent with two interfaces (one for rd_req and one for rd_resp), or would it be better to implement two separate agents, each handling one interface?
  2. If I choose to implement two agents, what is the recommended way to store and track the requested addresses, and how should I transfer the stored addresses to the second agent (handling rd_resp) to provide the correct response data?
  3. Regarding memory data storage, I have an input file containing the data. Where is the best place to manage and load this data within my UVM environment (e.g., scoreboard, predictor, or other components)?

In the next phase of development, I will need to extend the implementation to support both read and write operations. Any advice on structuring the testbench to accommodate this future enhancement would also be greatly appreciated.

Thanks in advance for your guidance.