Verification Academy
If timeunit and timeprecision declaration is mandatory with a value which is power of 10 units?
SystemVerilog
timeunit
,
delay-timescale-timeunit-systemverilog
,
SystemVerilog
dave_59
September 13, 2017, 1:40pm
2
In reply to
psubudhi
:
10 to the power 0 is 1.
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