I want to write an assertion for checking that the data stable for 16 clock cycles and continue the checking for the next 16 cycles and so on.?How can i write this?

UVM
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4

In reply to adharshh:
You can use the local variable. $stable checkes previoud and current value to assure the data has not canged.


I belived when the tx_frame is high, the data will be available on uart_txd_o;

a1: assert property (@(posedge tx_bclk) frame_check)

property framecheck
int local_data ;
disable iff(rst || !tx_frame)
(tx_frame, local_data = uart_txd_0) |-> (local_data == uart_txd_o)[*16]);
endproperty