I want to write an assertion for checking that the data stable for 16 clock cycles and continue the checking for the next 16 cycles and so on.?How can i write this?

UVM
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10

In reply to adharshh:

In reply to chr_sue:
How about this one, its seems working.
a1: assert property (@(posedge tx_bclk) frame_check)
property framecheck
int local_data ;
disable iff(!rst || !tx_frame)
(tx_frame, local_data = uart_txd_0) |=> (local_data == uart_txd_o)[=15]);
endproperty.
This property, take the txd_o value in the 1st baud clock and check it with the rest (with next 15 cycles) and so on.

Not sure why you have used “[=15]” operator here. That is non-contiguous. From your waveform, you want to check the stability on 16 consecutive clock ticks right?