I am preparing an enviornment for ALU using UVM. I have prapared a driver, monitor and sequencer in one agent and only a monitor in another agent. 1)Is that necessary to create a passive agent always? 2)If the answer is 'no', then how can I use the only

UVM
2

In reply to Prathamesh Govardhane:

I would suggest take a look
https://colorlesscube.com/uvm-guide-for-beginners/chapter-1-the-dut/
you can have two monitor in one agent
like
class simpleadder_agent extends uvm_agent;
`uvm_component_utils(simpleadder_agent)

uvm_analysis_port#(simpleadder_transaction) agent_ap_before;
uvm_analysis_port#(simpleadder_transaction) agent_ap_after;

simpleadder_sequencer		sa_seqr;
simpleadder_driver		sa_drvr;
simpleadder_monitor_before	sa_mon_before;
simpleadder_monitor_after	sa_mon_after;

…

Details : https://github.com/naragece/uvm-testbench-tutorial-simple-adder/blob/master/simpleadder_agent.sv
simpleadder_monitor_after evaluates expected out , and other one have data from the design