How to write SV checker for verifying if a DUT produced right image

In reply to n347:

Since the image is generated using an algorithm imposed on the input data, isn’t the comparison of the generated DUT image with an image generated by simulation of the algorithm sufficient?

If you are talking about a randomly generated image, you can impose that image against a reference model that creates the expected results.
If you only want to check that the statistics on the quality of the image produced (the items 1 and 2 in your list), then a simple count of the types of pixels produced should be sufficient. Of course, that does not guarantee that the filtering requirements are met.

Ben Cohen
http://www.systemverilog.us/ ben@systemverilog.us
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  • SVA Handbook 4th Edition, 2016 ISBN 978-1518681448
  • A Pragmatic Approach to VMM Adoption 2006 ISBN 0-9705394-9-5
  • Using PSL/SUGAR for Formal and Dynamic Verification 2nd Edition, 2004, ISBN 0-9705394-6-0
  • Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn 978-1539769712
  • Component Design by Example ", 2001 ISBN 0-9705394-0-1
  • VHDL Coding Styles and Methodologies, 2nd Edition, 1999 ISBN 0-7923-8474-1
  • VHDL Answers to Frequently Asked Questions, 2nd Edition ISBN 0-7923-8115

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