How to verify the correct functionality of the ready output signal from DUT in ready/valid interface?

[dave_59]

In reply to Michael54:

Lots of missing information.

1. Are you looking do this with an assertion?
2. What defines a valid transaction?
3. Can there be invalid transaction in between valid ones?
4. How do you know when to start counting transactions?
5. When can ready signal be de-asserted? on the 64th, immediately after, or before the next transaction?