In reply to ben@SystemVerilog.us:
Hi Ben,
Thanks for your reply.
// Thus for failure, all you need is any of the antecedent thread to match and
// its corresponding consequent to be a nonmatch
// If any antecedent of thoses threads is a nonmatch, then that thread is vacuously TRUE.
I think I misunderstood this part.
Your explanation is very clear.
Thanks again!
Regards
SC